# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 6
# RUN: llvm-mc -triple=amdgpu12.50 -disassemble -filetype=null < %s 2>&1 | FileCheck -check-prefix=GFX1250-ERR %s

0xa0,0x4e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

0xc5,0x4e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# Literal constants are invalid for split barrier operands.
0xff,0x4e,0x80,0xbe,0xbe,0x00,0x00,0x00
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# src_private_base (237) and src_private_limit (238) are reserved on targets
# with globally addressable scratch. Both the 32-bit and the 64-bit operand
# forms are covered here.
0xed,0x0e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

0xed,0x01,0xfe,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

0xee,0x0e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

0xee,0x01,0xfe,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# src_pops_exiting_wave_id (239) is only available on targets that support
# POPS.
0x00,0xef,0x0c,0xbf
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# src_vccz (251) and src_execz (252) are reserved on GFX11+.
0xfb,0x0e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

0xfc,0x0e,0x80,0xbe
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# The wmma source tuples are narrowed down according to the matrix formats, but
# scalar registers have no 384-bit tuple.
0x00,0x18,0x33,0xcc,0x08,0x30,0xa2,0x04
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# This encoding references a missing trailing literal.
0x00,0x00,0x33,0xcc,0xff,0x68,0x02,0x02
# GFX1250-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding
