# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 6
# RUN: llvm-mc -disassemble -triple=amdgpu9.50 -filetype=null < %s 2>&1 | FileCheck --check-prefix=GFX950-ERR %s

# The f8f6f4 source tuples are narrowed down according to cbsz/blgp, but ttmp
# registers have no 192-bit tuple.
0x00,0x00,0xae,0xd3,0x00,0xe9,0x00,0x64
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# Same, except that the source selector is an inline constant, which is not a
# register at all.
0x00,0x00,0xae,0xd3,0xf2,0x00,0x02,0x64
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# The 192- and 1024-bit source operands below are vector only. SGPR, ttmp, and
# special-register selectors cannot satisfy those operand profiles, so the
# encodings are invalid.

# v_cvt_scalef32_sr_pk32_fp6_f32 with the 1024-bit src0 set to s0.
0x00,0x00,0x54,0xd2,0x00,0x00,0x00,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_cvt_scalef32_sr_pk32_fp6_f32 with the 1024-bit src0 set to ttmp0.
0x00,0x00,0x54,0xd2,0x6c,0x00,0x00,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_cvt_scalef32_sr_pk32_fp6_f32 with the 1024-bit src0 set to exec_hi.
0x00,0x00,0x54,0xd2,0x7f,0x00,0x00,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_cvt_scalef32_pk32_f32_bf6 with the 192-bit src0 set to s0.
0x02,0x00,0x57,0xd2,0x00,0x0c,0x02,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_cvt_scalef32_pk32_f32_bf6 with the 192-bit src0 set to ttmp0.
0x02,0x00,0x57,0xd2,0x6c,0x0c,0x02,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_cvt_scalef32_pk32_f32_bf6 with the 192-bit src0 set to exec_hi.
0x02,0x00,0x57,0xd2,0x7f,0x0c,0x02,0x00
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_mfma_f32_32x32x1_2b_f32 with the 1024-bit src2 set to s0.
0x00,0x00,0xc0,0xd3,0x00,0x00,0x03,0x20
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_mfma_f32_32x32x1_2b_f32 with the 1024-bit src2 set to ttmp0.
0x00,0x00,0xc0,0xd3,0x00,0x00,0xb3,0x21
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding

# v_mfma_f32_32x32x1_2b_f32 with the 1024-bit src2 set to exec_hi.
0x00,0x00,0xc0,0xd3,0x00,0x00,0xff,0x21
# GFX950-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding
