# RUN: not llvm-mc --disassemble --triple=riscv32 --mattr=+experimental-zyhybrid %s 2>&1 \
# RUN:   | FileCheck %s
# RUN: not llvm-mc --disassemble --triple=riscv64 --mattr=+experimental-zyhybrid %s 2>&1 \
# RUN:   | FileCheck %s

## YMODEW with rd=x0 is reserved unless rs1=x0 and rs2 selects a valid mode
## (i.e. ymodeswy/ymodeswi).
[0x7b,0x00,0x20,0x56]
# CHECK: :[[#@LINE-1]]:2: warning: invalid instruction encoding
[0x7b,0x80,0x05,0x56]
# CHECK: :[[#@LINE-1]]:2: warning: invalid instruction encoding
[0x7b,0x80,0xc5,0x56]
# CHECK: :[[#@LINE-1]]:2: warning: invalid instruction encoding
